1. Field of the Invention
The present invention relates to a digital Direct Current (DC) offset correction circuit for obtaining a desired output DC offset value from a discrete-time amplifier and filter, and more particularly, to a digital DC offset correction method and device for enabling the circuit to operate stably by allowing for a uniform output DC offset value, despite variations in process, voltage, and temperature (PVT).
2. Description of the Related Art
Currently, a lot of attention is being paid to analog discrete-time signal processing. This type of signal processing is performed by processing a Radio Frequency (RF) signal in a discrete-time area, in contrast to traditional analog signal processing. In this analog discrete-time signal processing, a signal sampled by using a high speed clock is processed by a combination of a switch and a capacitor. The advantages of analog discrete-time signal processing are the easy control of a signal's input and output characteristics by the reconfiguration of a combination of a clock signal and a capacitor, and suitability for modern deep-submicron processing. However, since a passive element is commonly used, there is a disadvantageous reduction in signal magnitude.
In order to address such a disadvantage, as shown in FIG. 1, U.S. Patent Publication No. 2005/0275026 discloses a method of amplifying a signal using a difference in capacitance between a state in which a metal-oxide-semiconductor field-effect transistor (MOSFET) is inverted (a) and a state in which the MOSFET is not inverted (b).
However, this method may be problematic, in that, since a DC offset as well as a small signal is amplified, the range of an output signal that can be used is somewhat limited.
In order to solve such a problem, as shown in FIG. 2, Japanese Patent Laid-Open Publication No. 2008-099225 discloses a method of solely amplifying a small signal and removing an input DC offset by using two types of capacitors.
This method reduces the DC offset considerably, as compared to the conventional art. However, in the case that the characteristics of the two types of capacitors do not coincide with each other, an output DC offset is changed. Also, according to the capacitance of a load capacitor connected to a circuit, an output DC offset is changed.